1. Field of the Invention
The present invention relates generally to processors and, in particular, to microprocessors having circuitry which permits the microprocessor to operate in both a normal and in an in-system emulation (ISE) mode.
2. Background Art
When a microprocessor-based system is designed, there are typically "bugs" which occur only infrequently and only at full operating frequencies. Microprocessors system designers commonly rely on in-system emulation (ISE) techniques to monitor a working system and trace information used to diagnose "bugs." ISE techniques utilize a master processor which is part of the system being tested together with an ISE microprocessor which emulates the master processor. This is typically accomplished by operating the two microprocessors in lock-step synchronization, so that both processor execute the same code.
One of the most important values to trace is the Program Counter (PC) value of the master processor, which corresponds to the flow of control in the program. The PC value of the ISE processor will match that of the master processor since the two processes are operating in lock-step.
In early generation microprocessors, the PC value was available on normal microprocessor signal pins (terminals) for each instruction fetch. More recent microprocessors integrate cache memory on-chip, so that the majority of the instruction fetches are not visible off-chip. One more recent microprocessor provides the PC value on dedicated pins to support ISE capability. However, the PC value can exceed thirty-two bits, which are read out sixteen bits at a time in two consecutive clock cycles, thereby requiring sixteen dedicated pins. In the event a reduced instruction set processor (RISC) is used, all of the bits must be read out in one clock cycle thus requiring that all of the bits be read out in parallel. Accordingly, a large number of pins will be required. Such additional pins are costly and serve no value in a normal operation of the system.
The present invention overcomes the above-noted shortcomings of conventional microprocessors. The disclosed microprocessor permits the PC value to be read and displayed in ISE applications without resorting to the use of dedicated pins. This and other advantages of the present invention will become apparent to those skilled in the art upon a reading of the following Detailed Description of the Invention, together with the drawings.